{"product_id":"ettus-research-usrp-n210-software-defined-radio-system-sdr-open-source-rfx900","title":"Ettus Research USRP N210 Software Defined Radio System SDR Open Source RFX900","description":"\u003cp dir=\"ltr\" style=\"margin-top:0; margin-bottom:0;\"\u003eEttus Research USRP N210 Software Defined Radio System SDR Open Source UN210 FLEX900 RFX900\u003c\/p\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cp dir=\"ltr\" style=\"margin-top:0; margin-bottom:0;\"\u003eUsed see photos\u003c\/p\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cp dir=\"ltr\" style=\"margin-top:0; margin-bottom:0;\"\u003eTested w\/ RadioConda works see photos. Includes a FLEX900 \/ RFX900 daughter board. See photos for the specs.\u003c\/p\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cp dir=\"ltr\" style=\"margin-top:0; margin-bottom:0;\"\u003eSystem only includes the USRP N210 no peripherals seen in photos are included. Does not include a PC or monitor, that was shown for testing purposes only.\u003c\/p\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cp dir=\"ltr\" style=\"margin-top:0; margin-bottom:0;\"\u003eFrom Ettus,\u003c\/p\u003e\u003cbr\u003e\u003cp dir=\"ltr\" style=\"margin-top:0; margin-bottom:0;\"\u003e\"The USRP Network Series offers high-bandwidth, high-dynamic range processing capability. The Gigabit Ethernet interface of the USRP Network Series allows high-speed streaming capability up to 50 MS\/s in both directions (8-bit samples). These features, combined with plug-and-play MIMO capability make the USRP Network an ideal candidate for software defined radio systems with demanding performance requirements.\"\u003c\/p\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cp dir=\"ltr\" style=\"margin-top:0; margin-bottom:0; text-align:start;\"\u003e\u003cspan style=\"font-size:1.30em;\"\u003e\u003cb\u003eN210\u003c\/b\u003e\u003c\/span\u003e\u003c\/p\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cul style=\"margin-top:0; margin-bottom:0;\"\u003e\n\u003cbr\u003e\u003cli dir=\"ltr\"\u003e50 MHz of RF bandwidth with 8 bit samples\u003c\/li\u003e\n\u003cbr\u003e\n\u003c\/ul\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cul style=\"margin-top:0; margin-bottom:0;\"\u003e\n\u003cbr\u003e\u003cli dir=\"ltr\"\u003e25 MHz of RF bandwidth with 16 bit samples\u003c\/li\u003e\n\u003cbr\u003e\n\u003c\/ul\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cul style=\"margin-top:0; margin-bottom:0;\"\u003e\n\u003cbr\u003e\u003cli dir=\"ltr\"\u003eGigabit Ethernet connectivity\u003c\/li\u003e\n\u003cbr\u003e\n\u003c\/ul\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cul style=\"margin-top:0; margin-bottom:0;\"\u003e\n\u003cbr\u003e\u003cli dir=\"ltr\"\u003eMIMO capable - requires two or more USRP N210 devices as motherboard has one daughterboard slot (1 RX + 1 TX connectors)\u003c\/li\u003e\n\u003cbr\u003e\n\u003c\/ul\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cul style=\"margin-top:0; margin-bottom:0;\"\u003e\n\u003cbr\u003e\u003cli dir=\"ltr\"\u003eOnboard FPGA processing\u003c\/li\u003e\n\u003cbr\u003e\n\u003c\/ul\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cul style=\"margin-top:0; margin-bottom:0;\"\u003e\n\u003cbr\u003e\u003cli dir=\"ltr\"\u003eFPGA: Xilinx® Spartan® 3A-DSP XC3SD3400A\u003c\/li\u003e\n\u003cbr\u003e\n\u003c\/ul\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cul style=\"margin-top:0; margin-bottom:0;\"\u003e\n\u003cbr\u003e\u003cli dir=\"ltr\"\u003eADCs: 14-bits 100 MS\/s\u003c\/li\u003e\n\u003cbr\u003e\n\u003c\/ul\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cul style=\"margin-top:0; margin-bottom:0;\"\u003e\n\u003cbr\u003e\u003cli dir=\"ltr\"\u003eDACs: 16-bits 400 MS\/s\u003c\/li\u003e\n\u003cbr\u003e\n\u003c\/ul\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cul style=\"margin-top:0; margin-bottom:0;\"\u003e\n\u003cbr\u003e\u003cli dir=\"ltr\"\u003eAbility to lock to external 5 or 10 MHz clock reference\u003c\/li\u003e\n\u003cbr\u003e\n\u003c\/ul\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cul style=\"margin-top:0; margin-bottom:0;\"\u003e\n\u003cbr\u003e\u003cli dir=\"ltr\"\u003eTCXO Frequency Reference (~2.5ppm)\u003c\/li\u003e\n\u003cbr\u003e\n\u003c\/ul\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cul style=\"margin-top:0; margin-bottom:0;\"\u003e\n\u003cbr\u003e\u003cli dir=\"ltr\"\u003eOptional internal GPS locked reference oscillator\u003c\/li\u003e\n\u003cbr\u003e\n\u003c\/ul\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cul style=\"margin-top:0; margin-bottom:0;\"\u003e\n\u003cbr\u003e\u003cli dir=\"ltr\"\u003eFPGA code can only be changed with the paid version of the Xilinx® ISE® Design Suite tools\u003c\/li\u003e\n\u003cbr\u003e\n\u003c\/ul\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cul style=\"margin-top:0; margin-bottom:0;\"\u003e\n\u003cbr\u003e\u003cli dir=\"ltr\"\u003eFrequency range: DC - 6 GHz with suitable daughterboard\u003c\/li\u003e\n\u003cbr\u003e\n\u003c\/ul\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cp dir=\"ltr\" style=\"margin-top:0; margin-bottom:0;\"\u003ekk\u003c\/p\u003e","brand":"Lab Liquidators Store","offers":[{"title":"Default Title","offer_id":55933594108196,"sku":"SP111118398","price":2300.0,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0748\/5289\/2964\/files\/10_f9ad5977-5eb7-4a8a-93c6-2b2d0ee95615.jpg?v=1785435919","url":"https:\/\/store.labliquidators.com\/products\/ettus-research-usrp-n210-software-defined-radio-system-sdr-open-source-rfx900","provider":"Lab Liquidators Store","version":"1.0","type":"link"}